Manufacturing of device arrays with high density, for example transistor arrays, is currently of interest in the field of microelectronics. This is particularly the case with regard to logic circuits, displays, memory and sensor devices. More specifically, arrays of organic, plastic or polymer devices, e.g., polymer field effect transistors such as thin-film transistors (TFTs), are of interest in part due to a desire for low cost and low complexity of electronic circuit fabrication, and for fabrication of circuits having flexible substrates.
Direct printing techniques, e.g., droplet deposition by ink-jet printing, may be suitable for flexible and non-flexible circuits. However, in both cases, there remains a need for a technique that allows advantages such as improved yield, in particular in combination with, inter alia, short device feature lengths for high speed device operation and/or increased density of device arrays.
Some high resolution techniques have been developed as the range of nanoscale electronic materials has expanded. This has been driven by a growing need for scalable patterning techniques that allow probing the electronic properties of materials such as carbon nanotubes, graphene, nanowires, or organic semiconductors on a typical length scale of 100 nm. Techniques such as electron beam lithography or nanoimprinting may be used to define suitable electrode structures for these applications. However, while these techniques may be suitable in some circumstances for patterning on flat, rigid substrates such as silicon wafers, they are less well suited to, inter alia, non-planar, stretchable and/or flexible substrates and for achieving the above example advantages.
In view of the above, there is a continuing need in the field of microelectronic devices to provide high resolution printed substrates for devices and device arrays with, for example, improved patterning yield.
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